Thursday, July 30, 2009

HiDISC - Hierarchical Decoupled Instruction Stream Computer

HiDISC is a hierarchical decoupled instruction stream computer that has a compute processor, an access processer (which feeds operands from the cache to the compute processor), and a cache management processor (which can prefetch data from memory into the cache). HiDISC is designed to address the problem of increasing memory latency while taking advantage of instruction-level parallelism.

via:http://www.east.isi.edu/~crago/hidisc/

Posted via web from swathidharshananaidu's posterous

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